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2N6784
Data Sheet December 2001
2.25A, 200V, 1.500 Ohm, N-Channel Power MOSFET [ /Title (2N67 84) /Subject (2.25A , 200V, 1.500 Ohm, NChannel Power MOSFET) /Autho r ()
The 2N6784 is an N-Channel enhancement mode silicon gate power MOS field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits.
Features
* 2.25A, 200V * rDS(ON) = 1.500 * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device
Ordering Information
PART NUMBER 2N6784 PACKAGE TO-205AF BRAND 2N6784
* Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
NOTE: When ordering, use the entire part number.
Symbol
D
G
S
Packaging
JEDEC TO-205AF
DRAIN (CASE)
SOURCE
GATE
(c)2001 Fairchild Semiconductor Corporation
2N6784 Rev. B
2N6784
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified 2N6784 200 200 2.25 1.5 9 20 2.25 9 15 0.12 -55 to 150 300 260 UNITS V V A A A V A A W W/oC oC
oC oC
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulse Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 0.25mA, VGS = 0V VGS = VDS, ID = 0.5mA VDS = 200V, VGS = 0V VDS = 160V, VGS = 0V, TC = 125oC MIN 200 2 0.7 0.9 VDS = 25V, VGS = 0V, f = 1MHz (Figure 14) 60 20 5 Free Air Operation TYP 1.0 1.3 135 60 16 MAX 4 250 1000 3.37 100 1.500 2.81 1.5 2.7 15 20 30 20 200 80 25 8.33 175 UNITS V V A A V nA V S ns ns ns ns pF pF pF
oC/W oC/W
Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero Gate Voltage Drain Current
On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2)
VDS(ON) IGSS rDS(ON)
ID = 2.25A, VGS = 10V VGS = 20V ID = 1.5A, VGS = 10V, TA = 25oC ID = 1.5A, VGS = 10V, TA = 125oC
Diode Forward Voltage Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient
VSD gfs td(ON) tr td(OFF) tf CISS COSS CRSS RJC RJA
IS = 2.25A, VGS = 0V VDS = 5V, ID = 1.5A VDD 75V, ID = 1.5A, RG = 50 (Figure 17) MOSFET Switching Times are Essentially Independent of Operating Temperature
Source to Drain Diode Specifications
PARAMETER Reverse Recovery Time Reverse Recovered Charge NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal impedance curve (Figure 3). SYMBOL trr QRR TEST CONDITIONS TJ = 150oC, ISD = 2.25A, dISD/dt = 100A/s TJ = 150oC, ISD = 2.25A, dISD/dt = 100A/s MIN TYP 290 2.0 MAX UNITS ns C
(c)2001 Fairchild Semiconductor Corporation
2N6784 Rev. B
2N6784 Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 ID, DRAIN CURRENT (A)
Unless Otherwise Specified
2.5
2.0
1.5
0.6 0.4
1.0
0.2 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150
0.5
0 25 50 75 100 125 150 TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
1 THERMAL IMPEDANCE ZJC, NORMALIZED 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 t, RECTANGULAR PULSE DURATION (s) t1 t2 PDM
NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 1 10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
50 20 ID, DRAIN CURRENT (A) 10 10s 100s 1 1ms 10ms 100ms DC OPERATION IN THIS AREA IS LIMITED BY rDS(ON) ID, DRAIN CURRENT (A)
10 10V 8 PULSE TEST = 80s 9V
6
VGS = 8V
4 7V 2 6V 5V 0 4V 40 50
0.1 0.05 1
TC = 25oC TJ = MAX RATED SINGLE PULSE
10 100 VDS, DRAIN TO SOURCE VOLTAGE (V)
1000
0
10
20
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
(c)2001 Fairchild Semiconductor Corporation
2N6784 Rev. B
2N6784 Typical Performance Curves
10 PULSE TEST = 80s 8 10V 9V 10 5 ID, DRAIN CURRENT (A)
Unless Otherwise Specified (Continued)
80s PULSE TEST TJ = -55oC TJ = 25oC TJ = 125oC
ID, DRAIN CURRENT (A)
6 8V 4 7V 2 VGS = 6V 4.0V 0 0 4 6 8 2 VDS, DRAIN TO SOURCE VOLTAGE (V) 10 5V
2 1.0 0.5
0.2 0.1 0 2 4 6 8 10 12 14 VSD, GATE TO SOURCE VOLTAGE (V)
FIGURE 6. SATURATION CHARACTERISTICS
4 rDS(ON), ON-STATE RESISTANCE () 80s PULSE TEST NORMALIZED ON RESISTANCE 1.8 2.2
FIGURE 7. TRANSFER CHARACTERISTICS
VGS = 10V, ID = 1.25A
3 VGS = 10V 2
1.4
1.0
1
VGS = 20V
0.6
0
0.2 0 2 4 6 ID, DRAIN CURRENT (A) 8 10
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
NOTE: Heating effect of 2s pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE
500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS = CDS + CGD
1.15 C, CAPACITANCE (pF)
400
1.05
300
0.95
200 CISS 100 COSS CRSS
0.85
0.75
-40
0
40
80
120
160
0
0
TJ , JUNCTION TEMPERATURE (oC)
10 30 40 20 VDS, DRAIN TO SOURCE VOLTAGE (V)
50
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
(c)2001 Fairchild Semiconductor Corporation
2N6784 Rev. B
2N6784 Typical Performance Curves
2.5 gfs, TRANSCONDUCTANCE (S)
Unless Otherwise Specified (Continued)
80s PULSE TEST TJ = -55oC IDR, REVERSE DRAIN CURRENT (A)
10
80s PULSE TEST
2.0 TJ = 25oC 1.5 TJ = 125oC
TJ = 150oC
TJ = 25oC
1.0
1.0
0.5
0
0.1 0 2 4 6 ID, DRAIN CURRENT (A) 8 10
0
1.0 2.0 3.0 VSD, SOURCE TO DRAIN VOLTAGE (V)
4.0
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
15 VGS, GATE TO SOURCE VOLTAGE (V) ID = 4A
10
VDS = 40V VDS = 100V VDS = 160V
5
0
0
2
6 4 Qg, TOTAL GATE CHARGE (nC)
8
10
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
(c)2001 Fairchild Semiconductor Corporation
2N6784 Rev. B
2N6784 Test Circuits and Waveforms
VDS tP IAS VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG +
BVDSS L VDS VDD
VDD
0V
IAS 0.01
0 tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr VDS RL 90%
tOFF td(OFF) tf 90%
+
RG DUT
-
VDD
0
10% 90%
10%
VGS 0 10%
50% PULSE WIDTH
50%
VGS
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS (ISOLATED SUPPLY)
VDD Qg(TOT) VGS
12V BATTERY
0.2F
50k 0.3F
SAME TYPE AS DUT Qgs
Qgd
D G DUT 0
VDS
IG(REF) 0 IG CURRENT SAMPLING RESISTOR
S VDS ID CURRENT SAMPLING RESISTOR
IG(REF) 0
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
(c)2001 Fairchild Semiconductor Corporation
2N6784 Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
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Preliminary
First Production
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Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4

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